The integration of InGaP LEDs with CMOS on 200 mm Silicon wafers

TitleThe integration of InGaP LEDs with CMOS on 200 mm Silicon wafers
Publication TypeBook Chapter
Year of Publication2017
AuthorsWang, B, Lee, KHong, Wang, C, Wang, Y, Made, RI, Sasangka, WAji, Nguyen, VCuong, Lee, KEng Kian, Tana, CSeng, Yoon, SFatt, Fitzgerald, EA, Michel, J
EditorEldada, LA, Lee, EH, He, S
Book TitleSmart Photonic and Optoelectronic Integrated Circuits Xix
Volume10107
PaginationUNSP - 101070Y
PublisherSpie-Int Soc Optical Engineering
CityBellingham
ISBN Number978-1-5106-0655-5 978-1-5106-0656-2
KeywordsCMOS integration, gaas, ge, growth, InGaP LED, layers, strain engineering, wafer bonding
Abstract

The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.