|Title||Conductance slope and curvature coefficient of InGaAs/GaAsSb heterojunctions at varying band alignments and its implication on digital and analog applications|
|Publication Type||Journal Article|
|Year of Publication||2015|
|Authors||Iutzi, RM, Fitzgerald, EA|
|Journal||Journal of Applied Physics|
We assess InGaAs/GaAsSb heterojunctions at varying band alignments for applications in both tunnel field effect transistors (TFETs) as well as for nonlinear analog components such as millimeter wave detectors. We use conductance slope measurements as a fundamental figure of merit, as it is not affected by the three-terminal parasitics of subthreshold-slope in a TFET and represents the ideal subthreshold slope intrinsic to the junction in the absence of three-terminal parasitics. We prove that conductance slope/subthreshold slope is not equivalent to curvature coefficient, indicating that it is actually easier to exceed the thermal limit of curvature for analog applications than it is to exceed the subthreshold slope limit for digital applications. In addition, we show that no published heterojunction that exceeds the curvature limit would be capable of exceeding the subthreshold slope limit. We experimentally demonstrate the formation of epitaxial InGaAs/GaAsSb heterojunctions at varying band alignments accomplished using lattice-mismatched epitaxy with graded buffers. We show a dependence of conductance slope on material quality, adding further proof that "steepness" is limited by materials defects and inhomogeneity. We demonstrate that the conductance slope does not depend on temperature for type-II band alignment, adding further proof that TFETs, which show strong temperature dependencies, are dominated by thermal parasitics. Finally, we develop and demonstrate an InGaAs/GaAsSb heterojunction system integrated on an InP platform with a record 76mV/decade conductance slope and 43 V-1 curvature coefficient near zero-bias, with the capability of up to 60 V-1 curvature coefficient. (C) 2015 AIP Publishing LLC.